1. Field of the Invention
The present invention relates to transfer of data in an electronic system, and more particularly to a method and an apparatus for determining when data transferred between electronic devices that are clocked by different clock signals is corrupt.
2. Description of the Related Art
When an electronic device running at one clock frequency attempts to read data from an electronic device running at a different clock frequency, the asynchronous nature of the transaction may cause a hazard period where the data is corrupt. Such a hazard in an asynchronous circuit is an unwanted transient precipitated by unequal paths through a combinatorial network. Even when the electronic devices are running at the same clock frequency, if the clocks are not synchronized, a hazard period may exist.
There are three typical types of hazards: dynamic, static, and essential. A dynamic hazard is a multiple momentary transient in an output signal that should have changed only once in response to the input change. A static hazard is a single momentary transient in an output signal that should have remained static in response to an input change. An essential hazard is an operational error causing a transition to an improper state in response to an input change, generally caused by an excessive delay to a feedback variable in response to an input change. Hazards can cause operational problems by causing faulty state transitions in devices and presenting undesirable glitches to any device to which the hazard is connected.
A known method used to synchronize data transfer between electronic devices clocked by different clock signals was to provide an interface with multiple banks of flip-flops. In one prior art embodiment where data was transferred from a first device to a second device, a first bank of flip-flops would be clocked by a first clock signal provided by the first device. A second and third bank of flip-flops was clocked by a second clock signal provided by the second device to complete the data transfer. It would be desirable, however, to provide a technique for data transfer employing fewer gates and fewer delays.